Actually, in a pull-up design, E9 might help, not hinder, because it's pulling up from undefined region.
About about MISO being required to be pulled up with a resistor because of an open-collector drive, that would be very bad for SPI, in general. Also, I think the author is wrong regarding SD-MMC. Driven like that could not work at speeds of 25 MHz and above. This is how I2C barely reaches 1MHz with much stronger pull-up. On a push-pull/hi-z bus, the pull-up resistors are used to prevent free floating in hi-z state (ie during power up or sleep state).
But with MISO is weird ...
About about MISO being required to be pulled up with a resistor because of an open-collector drive, that would be very bad for SPI, in general. Also, I think the author is wrong regarding SD-MMC. Driven like that could not work at speeds of 25 MHz and above. This is how I2C barely reaches 1MHz with much stronger pull-up. On a push-pull/hi-z bus, the pull-up resistors are used to prevent free floating in hi-z state (ie during power up or sleep state).
If it was CS/SS, that's understandable, you should check those during reset/power-up, and don't just rely on internal pull-ups (after reset GPIO pins are in pull-down state and can trigger CS). If that's not tolerable you should use stronger external pull-ups to overcome the internal pull-downs during initialization.if I don't pull SPI1 (in this case) MISO high immediately on startup, this seems to trigger some kind of anomaly situation that causes performance to drop significantly while also not being easily resolved once triggered;
But with MISO is weird ...
Statistics: Posted by gmx — Mon Sep 09, 2024 12:46 am