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Interfacing (DSI, CSI, I2C, etc.) • Re: Change PLLD frequency to get a specific DSI frequency

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Don't forget that running on 3 data lanes is also an option.
not on a Pi4 - which is mentioned in OP's initial post. Maybe that's why he/she is limited to dual-lane DSI only.
But they also mentioned
(with 4-lane I could get 72MHz (3000/42), also out of spec)
which can't be achieved on a Pi4 either. If 4 lanes was being considered, then 3 lanes was also an option.
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The clock configuration can be altered via the dt-blob.bin file, as documented at https://www.raspberrypi.com/documentati ... figuration. There may be bit-rot in there as this hasn't been touched for many years.
Would this be applicable to RP1 on a Pi5 (or later products which will/may use RP1) as well?
No, dt-blob.bin isn't a thing at all on Pi5.
RP1 DSI blocks each have their own PLLs, so should be able to produce the link frequencies requested.
Thanks for the clarification!

still would like to see the panel data sheet as a clock frequency range of 2MHz only seems quite strange to me.

Statistics: Posted by aBUGSworstnightmare — Wed Apr 17, 2024 7:05 am



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